View M7085-SM1-R_745962.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

UNISONIC TECHNOLOGIES CO., LTD M7085
PFM STEP-DOWN DC-DC CONTROLLER
DESCRIPTION
The UTC M7085 step-down DC-DC Controller is optimized for use with a power PMOSFET. It utilize a Pulse-Frequency Modulation (PFM) control scheme that implies high efficiency operation at light loads. There are two user-selectable over-current protection methods one provides over-current protection by taking advantage of the RDS(ON) of the P- Channel. The other provides accurate over-current protection with the use of an external sense resistor. The cycle-by-cycle current limit threshold can be adjusted with a external resistor.
CMOS IC
MSOP -8
*Pb-free plating product number: M7085L
FEATURES
* High efficiency 90% and up is possible * Low dropout operation 100% duty cycle * Maximum operating frequency > 1MHz * Two methods of over-current protection * 4.5V ~ 35V wide input range * 1.24V ~ VIN adjustable output range
ORDERING INFORMATION
Order Number Normal Lead Free Plating M7085-SM1-R M7085L-SM1-R M7085-SM1-T M7085L-SM1-T Package MSOP-8 MSOP-8 Packing Tape Reel Tube
M7085L-SM1-R (1)Packing Type (2)Package Type (3)Lead Plating (1) R: Tape Reel, T: Tube (2) SM1: MSOP-8 (3) L: Lead Free Plating Blank: Pb/Sn ,
www.unisonic.com.tw Copyright (c) 2005 Unisonic Technologies Co., Ltd
1 of 8
QW-R502-092,A
M7085
PIN CONFIGURATION
ISENSE SGND NC FB
CMOS IC
1 2 3 4
8 7 6 5
VIN PGATE PGND ADJ
PIN DESCRIPTION
PIN NO 1 2 3 4 5 6 7 8 PIN NAME ISENSE SGND NC FB ADJ PGND GATE VIN DESCRIPTION The over-current protection input pin that be connected to Drain node of the external PChannel. Signal ground. No connection. The feedback voltage input. The over-current protection input pin that adjust current limit threshold. Power ground. Driver pin to Gate of the external P-Channel. PGATE swings between VIN and VIN-5V. Power supply
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
2 of 8
QW-R502-092,A
M7085
BLOCK DIAGRAM
VIN 8
Internal Regulator
CMOS IC
Internal 6V
PMOS BUFFER
Band Gap 1.240V
7 PGATE
ADJ 5 ISENSE 1 OC CMP 5.5A
1.240V One shot pulse Generator
6 PGND
CMP
4 FB
2 SGND
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
3 of 8
QW-R502-092,A
M7085
ABSOLUTE MAXIMUM RATING
CMOS IC
PARAMETER SYMBOL RATINGS UNIT Input Voltage VIN -0.3 ~ 36 V PGATE Voltage VPGATE -0.3 ~ 36 V FB Voltage VFB -0.3 ~ 5 V ISENSE Voltage VISNS -1.0 ~ 36 V ADJ Voltage VADJ -0.3 ~ 36 V Power Dissipation (TA =25 ) PD 400 mW Junction Temperature TJ 150 Storage Temperature TSTG -65 ~ +150 Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied.
OPERATING RATINGS
PARAMETER Supply Voltage Operating Junction Temperature SYMBOL TOPR RATINGS 4.5 ~ 35 -40 ~ +125 UNIT V
ELECTRICAL CHARACTERISTICS
VIN = 12V, VISNS = VIN - 1V, and VADJ = VIN - 1.1V, Ta=25 PARAMETER SYMBOL TEST CONDITIONS Feedback Voltage (Note 1) Minimum Driver Voltage Comparator Hysteresis VFB VPGATE(MIN) VHYS RADJ = 20 RADJ = 160 VFB = 1.5V VFB = 1.5V VFB = 1.0V Source VIN = 7V, PGATE = 3.5V Sink VIN = 7V, PGATE = 3.5V Source ISOURCE = 100mA Sink ISINK = 100mA VADJ = 11.5V VISNS = 11.0V VFB = 1.0V VISNS = VADJ+0.1V CLOAD on OUT = 1000Pf (Note 4) VISNS = VADJ+0.1V VFB = 1.0V CLOAD on OUT = 1000pF (Note 4) -20 3.0 VIN = 4.5V VFB = 1.0V IGATE = 100A sink MIN 1.224 1.215 TYP 1.240 1.15 10 15 110 880 0 5 320 0.4 A 0.3 5 8 5 8 13 S 16 21 MAX 1.256 1.265 UNIT V V mV mV +20 7.0 756 mV A nA
Current Limit Comparator Trip Voltage VCL (Note2) Current Limit Comparator Offset Current Limit ADJ Current Source FB pin Bias Current (Note 3) Driver Output Current VCL(OFF) ICL(ADJ) IFB IPGATE
Driver Resistance
RPGATE
Current Limit One Shot off Time
TCL
Minimum on Time in Normal Operation
TOPR(MIN)
110
ns
Minimum on Time in Current Limit Feedback Voltage Line Regulation Quiescent Current at Ground Pin
TCL(MIN) %VFB/ IQ
185 0.010 300 500
ns %/V A
VIN 4.5 VIN 35V FB = 1.5V (Not Switching)
Note 1. The VFB is the trip voltage at the FB pin when PGATE switches from high to low. 2. VCL = ICL_ADJ * RADJ 3. Bias current flows out from the FB pin. 4. A 1000pF capacitor is connected between VIN and PGATE.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
4 of 8
QW-R502-092,A
M7085
TYPICAL APPLICATION CIRCUIT
VIN 4.5V ~ 35V CIN 22F RADJ CADJ 5 ADJ 6 VIN 2.6 UTC M7085
PGATE ISENSE FB 7 1 4
CMOS IC
Q1 L1 22H D1
VOUT 3.3V R1 33K
COUT 100uF
R2 20K
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
5 of 8
QW-R502-092,A
M7085
APPLICATION INFORMATION
CMOS IC
Setting the output voltage Select an output voltage between 1.24V and VIN by connecting FB to a resistive voltage-divider between VOUT and GND (see the Typical Operating Circuit). Choose R2 for a reasonable bias current in the resistive divider. A wide range of resistor values is acceptable. R1,R2 is given by: VOUT = 1.240* ( R1 + R2 ) / R2 Setting over current protection threshold by the RDS(ON) of the P-Channel The UTC M7085 has a cycle-by-cycle current limit. Current limit is sensed across the VDS of the P-Channel or across an additional sense resistor. When current limit is activated, the UTC M7085 turns off the external P-Channel for a period of 9s(typical). The current limit is adjusted by an external resistor, RADJ. The current limit circuit is composed of the ISENSE comparator and the one-shot pulse generator. The positive input of the ISENSE comparator is the ADJ pin. An internal 5.5A current sink creates a voltage across the external RADJ resistor. This voltage is compared to the voltage across the P-Channel or sense resistor. The ADJ voltage can be calculated as follows: VADJ = VIN - (RADJ * 3.0A) Where 3.0A is the minimum ICL(ADJ) value. The negative input of the ISENSE comparator is the ISENSE pin that should be connected to the drain of the external P-Channel. The inductor current is determined by sensing the VDS. It can be calculated as follows. VISENSE = VIN - (RDS(ON) * IIND_PEAK) = VIN - VDS CADJ 5.5A ADJ 5 1 ISENSE RADJ VDS VIN
ISENSE COMP
FIGURE 1. Current Sensing by VDS The current limit is activated when the voltage at the ADJ pin exceeds the voltage at the ISENSE pin. The ISENSE comparator triggers the 9s one shot pulse generator forcing the driver to turn the P-Channel off. The driver turns the P-Channel back on after 9s. If the current has not reduced below the set threshold, the cycle will repeat continuously. A filter capacitor, CADJ, should be placed as shown in Figure 1. CADJ filters unwanted noise so that the ISENSE comparator will not be accidentally triggered. A value of 100pF to 1nF is recommended in most applications. Higher values can be used to create a soft-start function. The current limit comparator has approximately 100ns of blanking time. This ensures that the P-Channel is fully on when the current is sensed. However, under extreme conditions such as cold temperature, some P-Channels may not fully turn on within the blanking time. In this case, the current limit threshold must be increased. If the current limit function is used, the on time must be greater than 100ns. Under low duty cycle operation, the maximum operating frequency will be limited by this minimum on time.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
6 of 8
QW-R502-092,A
M7085
APPLICATION INFORMATION(Cont.)
CMOS IC
Setting over current protection threshold by external sense resistor The VDS of a P-Channel will tend to vary significantly over temperature. This will result an equivalent variation in current limit. To improve current limit accuracy an external sense resistor can be connected from VIN to the source of the P-Channel, as shown in Figure 2. CADJ
5.5A
ADJ 5 1 ISENSE RADJ VIN
ISENSE COMP
FIGURE 2. Current Sensing by External Resistor
Setting start up time The current limit circuit is active during start-up. During start-up the P-Channel will stay on until either the current limit or the feedback comparator is tripped If the current limit comparator is tripped first then the fold back characteristic should be taken into account. Start-up into full load may require a higher current limit set point or the load must be applied after start-up. One problem with selecting a higher current limit is inrush current during start-up. Increasing the capacitance(CADJ) in parallel with RADJ results in soft-start. CADJ and RADJ create an RC time constant forcing current limit to activate at a lower current. The output voltage will ramp more slowly when using the soft-start functionality. There are example start-up plots for CADJ equal to 1nF and 10nF in the Typical Performance Characteristics. Lower values for CADJ will have little to no effect on soft-start. Inductor selection (L1) UTC M7085 operates over a wide frequency range and can use a wide range of inductance values. The inductance value and the resulting ripple is one of the key parameters controlling operating frequency. The second is the ESR. Output capacitor selection (COUT) The output capacitor, COUT, is required to keep the output voltage ripple small and to ensure regulation loop stability. COUT must have low impedance at the switching frequency. For most applications, a 200f capacitor is sufficient. Input capacitor selection (CIN) The input capacitor, CIN, reduces the current peaks drawn and reduces switching noise in the IC. a bypass capacitor is required between the input source and ground. It must be located near the source pin of the external P-Channel. The input capacitor prevents large voltage transients at the input and provides the instantaneous current when the P-Channel turns on. The capacitance value should be selected such that the ripple voltage created by the charge and discharge of the capacitance is less than 10% of the total ripple across the capacitor. Catch diode selection (D1) The important parameters for the catch diode are the peak current, the peak reverse voltage, and the average power dissipation. For high temperature applications, diode leakage current may become significant and require a higher reverse voltage rating to achieve acceptable performance.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
7 of 8
QW-R502-092,A
M7085
APPLICATION INFORMATION(Cont.)
CMOS IC
P-Channel MOSFET Selection(Q1) An external P-Channel power MOSFET must be used the UTC M7085 key selection criteria for the power for the P-Channel are the maximum Drain-Source voltage (VDS) MOSFET are the gate threshold, VGS, the "ON" resistance, RDS(ON) and its total gate charge. The voltage across the PFET when it is turned off is equal to the sum of the input voltage and the diode forward voltage. The VDS must be selected to provide some margin beyond the input voltage. RDS(ON)determines the conduction losses for each switching cycle, the lower the ON resistance, the higher the efficiency can be chivied. A power MOSFET with lower gate charge can give lower switching losses but the fast transient can cause unwanted EMI to the system. Compromise in between is required during the design stage. keeping the gate capacitance below 2000pF is recommended.
UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
8 of 8
QW-R502-092,A

▲Up To Search▲

Price & Availability of M7085-SM1-R

	To Download M7085-SM1-R Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .